A memory device may be configured to receive power from a host to which it is connected. During an initial time period that the host is supplying the power, the memory device may begin consuming the power and drawing current. In some situations, during this initial time period, the amount of current being drawn may be more than what the host may be configured to supply. These situations may occur, for example, because the host is noncompliant with an associated specification or protocol (e.g., a Universal Serial Bus (USB) protocol) in that the host is configured to supply a lower amount of current than what the specification allows the memory devices to consume during this initial time period. As a result, a voltage level of the power supply may begin to drop. Consequently, regulators of the memory device may stop performing in their respective regulation modes. Also, the amount of current drawn may increase and in some cases may spike. Ultimately, the host may stop supplying power altogether, shutting down its connection and preventing communication between the two devices.
Some hosts may be configured to switch to a higher power mode after the initial period, at which point they may be configured to supply the amount of current that the memory device wants to draw without detecting a problem. Prior solutions to address this problem have taken advantage of this aspect of the hosts and have implemented a front end controller that delays an initial ramp up of the power supply to the primary controller of the memory device. By delaying the initial ramp up, the memory device may begin drawing the current after the host has switched to its higher power mode.
However, implementing both the front end delay controller and the actual memory controller may be costly. In addition, the amount of delay provided by the initial controller may be fixed. As a consequence, the amount of delay may not be long enough for some existing or later developed hosts. Yet, if the delay is too long, then unnecessary time may be wasted where the memory device could otherwise be operating. As such, a less costly and/or more flexible way for communicating with non-compliant hosts that do not supply a sufficient amount of current during an initial phase or time period may be desirable.